Q1: What C statement is represented by the following RISC-V assembly code?
add x5, x8, x9
add x6, x20, x11
sub x8, x5, x6
Solution: a = (a + b) - (c + d);
Q2: Which of the following RISC-V instruction implements the C assignment
n = A[3];
assuming n is in x9, the base address of A is in x10, and A is an array of uint64_t?
Solution: ld x9, 24(x10)
Q3: The statement that RISC-V is little-endian means that the least-significant byte of a doubleword in memory is at the lowest address and the most-significant byte the doubleword is at the highest address.
Solution: True
Q4: What range of values can be used as the immediate operand in a RISC-V addi instruction?
Solution: −2048 to +2047
Q5: What RISC-V instruction is encode by the hexadecimal word 04533023?
Solution: sd x5, 0x040(x6)
Q6: If the register x8 contains the value 0x804600B91200C00F, what value is placed in x5 by the instruction
srli x5, x8, 4
Solution: 0x0804600B91200C00
Q7: What C statement is implemented by the following RISC-V assembly code, assuming a is in x9 and b is in x18?
blt x18, x9, L1
addi x9, x9, 1
L1:
Solution: if (a <= b) a = a + 1;
Q8: Which of the RISC-V code sequences correctly implements the C statements
i = 0;
while (A[i] != 0) i++;
assuming i is in x9 and the address of A is in x18
Solution:
addi x9, x0, 0
L1: slli x5, x9, 3
add x5, x5, x18
ld x5, 0(x5)
beq x5, x0, L2
addi x9, x9, 1
j L1
L2:
Q10: The RISC-V calling convention uses registers x10 to x17 for parameter passing. If a procedure has more than eight parameters, where are the additional parameters passed?
Solution:
They are pushed onto the stack by the caller.
add x5, x8, x9
add x6, x20, x11
sub x8, x5, x6
Solution: a = (a + b) - (c + d);
Q2: Which of the following RISC-V instruction implements the C assignment
n = A[3];
assuming n is in x9, the base address of A is in x10, and A is an array of uint64_t?
Solution: ld x9, 24(x10)
Q3: The statement that RISC-V is little-endian means that the least-significant byte of a doubleword in memory is at the lowest address and the most-significant byte the doubleword is at the highest address.
Solution: True
Q4: What range of values can be used as the immediate operand in a RISC-V addi instruction?
Solution: −2048 to +2047
Q5: What RISC-V instruction is encode by the hexadecimal word 04533023?
Solution: sd x5, 0x040(x6)
Q6: If the register x8 contains the value 0x804600B91200C00F, what value is placed in x5 by the instruction
srli x5, x8, 4
Solution: 0x0804600B91200C00
Q7: What C statement is implemented by the following RISC-V assembly code, assuming a is in x9 and b is in x18?
blt x18, x9, L1
addi x9, x9, 1
L1:
Solution: if (a <= b) a = a + 1;
Q8: Which of the RISC-V code sequences correctly implements the C statements
i = 0;
while (A[i] != 0) i++;
assuming i is in x9 and the address of A is in x18
Solution:
addi x9, x0, 0
L1: slli x5, x9, 3
add x5, x5, x18
ld x5, 0(x5)
beq x5, x0, L2
addi x9, x9, 1
j L1
L2:
Q10: The RISC-V calling convention uses registers x10 to x17 for parameter passing. If a procedure has more than eight parameters, where are the additional parameters passed?
Solution:
They are pushed onto the stack by the caller.
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