Thursday, 14 May 2020

Quiz on Textbook Sections 5.4 and 5.10

Question 2: The average memory access time (AMAT) is the average time to access memory, considering both hits and misses, for various kinds of memory accesses.

Solution:


True

Question 4: Match the following descriptions to the terms defined:

Solution:

A cache structure in which a block can be placed in any location in the cache

fully associative cache

A cache that has a fixed number of locations (at least two) where each block can be placed.
set-associative cache

A cache that has a single location in which each block can be placed.
direct-mapped cache

Question 6: Least recently used (LRU) replacement refers to a scheme in which the entry in a set selected for replacement on a miss is the one that has been unused for the least time.

Solution:

False

Question 7: In a multi-level cache system, the miss penalty for the first-level cache is:

Solution:


The number of cycles required to access the second-level cache

Question 8: A dynamically-scheduled processor with out-of-order execution can hide cache-miss latency by executing other independent instructions while the missed word is read from memory.

Solution:


True

Question 9: Match the following descriptions to the terms defined:

Solution:

The property of a memory system that any read of a data item returns the most recently written value of that data item.

coherence

The property of a memory system that determines when a written value will be returned by a read.
consistency

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